Semiconductor technologies continue to improve and increase the integrated circuit density on a chip. As described below, special problems arise when increasing the density of MOS transistors. As is well known, a MOS transistor is a device in which a current in a conducting channel between a source and a drain is modulated by a voltage applied to a gate. In a p-channel MOS (PMOS) transistor, the majority of carriers are holes. Thus, a negative voltage is applied on the gate to form the conductive p-channel. However, the gate voltage must reach a level called the threshold voltage in order for the channel region to conduct. The threshold voltage is dependent in part on the conductivity of the MOS transistor's gate.
Polysilicon is a standard gate material and is typically deposited on a semiconductor substrate between a drain and source region using a chemical vapor deposition (CVD) process. For a p-channel MOS transistor, the polysilicon deposition is commonly followed by a boron diffusion to dope the polysilicon gate and thereby lower its resistivity. To obtain faster devices and a low resistance gate, various silicides are used in forming the gate. For example, a combination of polysilicon and a refractory metal silicide layers (i.e., polycide) are often used in forming the gate. Polycide has resistivity and temperature advantages that make its use very important as the industry moves to smaller device geometric. However, the use of boron as a dopant to adjust threshold voltage of a p-channel device becomes less feasible as devices use even thinner gate oxide because larger doses of boron are needed, which makes the gate oxide more susceptible to boron contamination. In addition, buried channel devices are subject to more process variability stemming from the difficulty of controlling the compensating doping.
As stated above, a problem encountered with p.sup.+ -polysilicon gates is the poor threshold voltage process control in the PMOS devices, due to penetration of boron into the gate oxide. For example, boron will penetrate gate oxide that is thinner than 125 angstroms thick during a 30 minute post-implant anneal in a nitrogen gas ambient at 900.degree. C. (see S. Wolf "Silicon Processing for the VLSI Era" Vol. 3). It is also been found that the presence of fluorine in the gate oxide worsens the boron penetration problem. Fluorine can be introduced into the gate oxide when the PMOS source drain regions are implanted using BF.